10 Gigabit Ethernet has been widely used in enterprise networks and metropolitan area networks (MANs) in the last decades. Nowadays, communication companies are shifting their attention to 100g Ethernet. With the development of big data and cloud computing, it is necessary to upgrade the data center switch. The core of 100G Ethernet is optical transceiver modules, 4×25GB/s QSFP28 parallel transceiver module provides a solution for high-speed interconnected transmission, with larger transmission capacity, higher port density, lower power consumption and cost. This article will tell how to test a 100G QSFP28 optical transceiver and what the key index requirements are that a QSFP28 module should meet.
Why Are 100G QSFP28 Transceivers Increasing?
Compared with the first generation 100G common form-factor pluggable transceiver CFP optical module and CFP4 optical module, the optical module packaged in QSFP28 has obvious advantages.
From the appearance aspect, the size of the CFP4 package is a quarter of that of the first generation CFP, however, the size of QSFP28 is even much smaller than that of CFP4. Therefore, 100G QSFP28 is suitable for higher density switch devices, so as to realize the higher forwarding service capability of a single switch and provide the possibility of building a super large-scale data center.
From the performance aspect, the QSFP28 optical module is 4-channel 25GB/s parallel transmission, compared with 10 channel 10GB/s transmission of CFP optical module, it supports the latest 100G Ethernet standard. Compared with the 4-channel 10GB/s transmission rate of the QSFP+ optical module, it occupies the same amount of channel resources but can achieve 2.5 times the transmission performance. Therefore, it is of great significance in the era of big data development. The demand for 100G QSFP28 is increasing and learning how to test a QSFP28 transceiver is essential especially when you are buying 100G QSFP28 transceivers from third-party manufacturers.
100G QSFP28 Optical Transceiver Testing Methods
Optical transceivers are mainly used in large switching networks such as park switch networks and data center switches. As the optical module is a kind of subordinate equipment, most communication equipment companies purchase optical modules externally. Therefore, for large-scale communication equipment such as switches and routers, the adaptation and debugging of optical modules is an extremely important task.
Generally speaking, the signal test of the optical module is divided into low-speed signal test and high-speed signal test. This paper will focus on the logic level index and timing index of I2C in the low-speed signal test of the optical module and the method in the process of R&D and debugging, as well as the optical eye diagram test in the high-speed signal test of the optical module.
I2C Signal Test
I2C interface test is vital in optical transceiver debugging. The I2C bus provides a convenient interface for software drivers. Meanwhile, the platform software can use the I2C bus to realize a series of functions, which is convenient for users to manage and control the optical transceiver. For example, through software processing, the internal control chip of the optical transceiver allows the user to monitor the important information of transceivers such as the alarm and the current use status of the optical module. Therefore, in the process of debugging, the electrical index requirements and timing requirements of optical module I2C must be strictly followed.
QSFP28 standard not only defines the form factor structure of the 100G optical transceiver but also defines its electrical index and timing index. Its purpose is to make the optical modules produced by various manufacturers more compatible with the market communication devices such as switches and routers. The electrical parameters of low-speed signal, I2C timing requirements and I2C timing diagram are shown in Table 1, Table 2, and Figure 2 respectively.
Tab.1 Electrical Parameters of Low-Speed Signals
|SCL, SDA||Output Low Voltage||0.0||0.4|
|Output High Voltage||VCC-0.5||VCC+0.3|
|Input Low Voltage||-0.3||VCC*0.3|
|Input High Voltage||VCC*0.7||VCC+0.5|
|Other||Input Low Voltage||-0.3||0.8|
|Input High Voltage||2.0||VCC+0.3|
Tab.2 Timing Parameters of I2C Bus
|Clock Pulse Width Low||1.3||μs|
|Clock Pulse Width High||0.6||μs|
|Time Bus Free Before New Transmission Can Start||20||μs|
|Start Hold Time||0.6||μs|
|Start Set-up Time||0.6||μs|
|Data In Hold Time||0||μs|
|Data In Set-up Time||0.1||μs|
|Input Rise Time(400kHz)||300||μs|
|Input Fall Time(400kHz)||300||μs|
|Stop Set-up Time||μs|
|Serial Interface Clock Holdoff(Clock Stretching)||500||μs|
Eye Diagram Test
According to the function of the module, the eye diagram test can be divided into transmitter and receiver. The transmitter side test is mainly to observe whether the eye pattern quality of the optical signal transmitted by the optical module meets the requirements of Ethernet definition specification. Table 3 shows the optical signal parameters emitted by 100G short-range optical modules defined by 100G Ethernet. In the actual test of the optical signal eye diagram, the most concerned is the above indicators and eye diagram quality. Table 4 lists the test results of QSFPTEK company 100G QSFP28 SR4 optical module. It can be seen that the eye diagram quality and test indicators fully meet the specification requirements.
Tab.3 Optical Transmitter Signal Parameter of Optical Module
|Rate Range of Each Channel||25.78125 ±10^-4||GBd|
|Central Wavelength Range||840~860||nm|
|Average Transmit Power of Each Channel (Max.)||2.4||nm|
|Average Transmit Power of Each Channel (Min.)||-8.4||dBm|
|Optical Modulation Amplitude (Max.)||3.0||dBm|
|Optical Modulation Amplitude (Min.)||-6.4||dBm|
|Extinction Ratio (Min.)||2.0||dBm|
Tab.4 Transmitter Test Results of QSFPTEK 100G QSFP28 SR4 Transceiver
|Average Transmit Power||-0.180||dB|
|Optical Modulation Amplitude||0.212||dB|
Receiver Disturbance Test
As the data rate increases, the bit period becomes shorter and shorter, so the jitter requirement is higher and higher. From the perspective of the optical module as a whole, in order to better reflect the anti jitter ability of the optical module, the whole optical module link needs to be tested. Although the Ethernet specification specifies the index of the receiving end, however, in the actual development process of switching network products, testers usually are not able to find a suitable test point to test the eye diagram quality of the receiving end, this paper provides an indirect test method to reflect the situation of the whole closed-loop link from the signal received from the optical module to the transmission. This test method can also be called receiver disturbance test.
The transmitting end link and the receiving end link are looped back in the PMA sublayer so that the signal does not pass through the PCS sublayer. At the same time, jitter is injected at the transmitting end. The jitter here refers to the jitter that can be tolerated when the bit error rate is within E-15. It can be seen as total jitter (TJ). The total jitter also includes random jitter (RJ) and deterministic jitter (DJ). The injected jitter must be within the specified range. Finally, the bit error rate of the transmitter is analyzed by the Bit Error Rate Tester (BERT), and the bit error rate is required to be below E-15. This method not only avoids the situation that the tester cannot find the test point, but also can observe whether the bit error rate of the whole loopback link meets the requirements in bad conditions.
At present, 100G Ethernet has quickly become popular in data centers and metropolitan area networks. The QSFP28 optical module also shows its advantages of high density and high speed. QSFPTEK provides a variety of QSFP28 portfolios including 100G QSFP28 SR4, 100G QSFP28 LR4, 100G QSFP28 CWDM4, 100G QSFP28 PSM4, 100G QSFP28 ER4, 100G QSFP28 DWDM, etc. All QSFPTEK optical transceivers are undergoing rigorous testing to ensure high performance and full compatibility.